Intel SoC Design Engineer in Fort Collins, Colorado
In this role responsibilities include, although not limited to:
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development
Determines architecture design, logic design, and system simulation
Defines module interfaces/formats for simulation
Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs
Contributes to the development of multidimensional designs involving the layout of complex integrated circuits
Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing
Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results
May also review vendor capability to support development
Colorado Pay Transparency Law requires that Intel discloses the compensation for jobs which could be performed in Colorado. Intel anticipates that the annual base pay range for this role in Colorado is Min $111000 - Max $166390 In addition to base pay, regular Intel employees are eligible for an Annual Performance Bonus (“APB”) and Quarterly Profit Bonus (“QPB”). Payout of APB is subject to eligibility and other program conditions as well as the Company’s performance to its operational and financial goals. Payout of QPB connects Intel’s employees to the quarterly profits of the Company. Employees in eligible sales and marketing positions receive commission in lieu of APB but are eligible for QPB. Information about these bonus programs as well as the host of expansive stock, health, retirement and vacation benefits offered to Intel employees are available here (https://www.intel.com/content/www/us/en/jobs/benefits.html) .html Interns and Intel Contract Employees are not eligible for APB or QPB or for some employee benefits including, but not limited to, disability, life insurance, retirement, equity and certain leave programs.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience -OR- a Master's degree in Electrical/Computer Engineering or Computer Science and 3+ years of experience in the industry.
Experience with Synopsys EDA tools including Design Compiler, Fusion Compiler and ICC2
Familiarity with TCL and Perl
Previous examples of having owned physical hardening from RTL to GDS
Inside this Business Group
Xeon and Networking Engineering (XNE) focuses on the development and integration of XEON and Networking SOC's and critical IP's sustain Intels Xeon and 5G networking roadmap.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.